1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, a semiconductor device represented by a nonvolatile semiconductor memory (FeRAM: Ferroelectric Random Access Memory) using ferroelectric material for a dielectric film of a capacitor, or a volatile semiconductor memory (DRAM: Dynamic Random Access Memory) using high-dielectric material for the dielectric film of the capacitor, or a hybrid system LSI consisting of such memory device and a logic device, and a method of manufacturing the same.
2. Description of the Prior Art
In recent years, FeRAM which uses the ferroelectric material for the dielectric film of the capacitor become the focus of public attention as the nonvolatile semiconductor memory with low power consumption. Also, in recent years, miniaturization and higher integration of the semiconductor memory are requested. In order to satisfy such request, DRAM that uses the high-dielectric material for the dielectric film of the capacitor has been developed.
Normally, metal oxides are used as the ferroelectric material of FeRAM and the high-dielectric material of DRAM respectively.
Such the ferroelectric material and the high-dielectric material are weak at the reducing atmosphere. Especially the ferroelectric material has such a property that the polarization characteristic is readily degraded.
In Patent Application Publication (KOKAI) Hei 9-307074, as the method of preventing the degradation in the polarization characteristic of the ferroelectric material, it is set forth that reduction of the dielectric film of the capacitor can be prevented if an underlying insulating film formed of sputter silicon oxide or SOG (Spin-On-Glass) is formed on the capacitor and then an overlying insulating film formed of silicon oxide is formed on the underlying insulating film by using ozone and TEOS (tetraethoxysilane: Si(OC2H5)4). Also, in Patent Application Publication (KOKAI) Hei 10-275897, it is set forth that the degradation in the polarization characteristic of the capacitor formed below the wiring conductive film can be prevented if the wiring conductive film is not formed in the reducing atmosphere by using the metal CVD (Chemical Vapor Deposition) equipment or the MO (Metal Organic) CVD equipment, but formed by the DC sputter. In this Publication, it is also set forth that the SiO2 film is formed on the capacitor by the plasma enhanced CVD method using TEOS and then the wiring is connected the upper electrode of the capacitor via the hole formed in the SiO2 film.
In addition, in Patent Application Publication (KOKAI) Hei 11-238855, such a structure is set forth that the thin conductive pattern (wiring) is connected the upper electrode of the capacitor via the hole formed in the thin insulating film covering the capacitor, then the thick aluminum wiring pattern is formed on the insulating film covering the conductive pattern, and then the insulating film is formed to cover the aluminum wiring pattern.
However, in Patent Application Publication (KOKAI) Hei 11-238855, since the film thickness of the aluminum wiring pattern used as the bit line is thick, the level of surface unevenness of the interlayer insulating film formed on the wiring pattern is increased.
Then, if the unevenness of the interlayer insulating film covering the aluminum wiring pattern is increased, the focus of the exposure light is ready to be defocused in the photolithography step applied to form the upper wiring on the interlayer insulating film. Thus, the problem that patterning precision of the upper wiring is lowered is caused. In particular, if the interlayer insulating film is formed by the plasma enhanced CVD method, the level of the surface unevenness of the interlayer insulating film is ready to increase.
In contrast, it is possible to consider that the HDP (High Density Plasma) CVD SiO2 film which has small surface unevenness may be formed. In this case, there is a possibility that hydrogen attacks into the insulating film in forming the HDP CVD SiO2 film to thus reduce the oxide dielectric film of the capacitor